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Junior Varsity
X32 Discussion
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<blockquote data-quote="Per Søvik" data-source="post: 71739" data-attributes="member: 1285"><p>Re: Firmware and patching concerns</p><p></p><p>To satisfy the patching needs that sometimes arise, maybe what we need is a "patch-panel" with two blocks of eight patches. This would satisfy the need to patch things by eight where that is needed, you just get a couple more selections ie Patch 1-8 and Patch 9-16. In the "Patch-panel" you should be free to select any signal individually for each patch, and the patches should be available as source everywhere.</p><p>Such a Patch-panel wouldn't really require extra processing load, as it would (for the most part, depending on how the signals are distributed between the processors) only be a matter of modifying patching adresses.</p><p>If it is possible to implement this relatively easily within the structure of the current firmware, I wouldn't know.</p><p></p><p>As I haven't got any P16s and are not planning to get any for a while, I use the p16 as my patching panel, looping the AES50 from A to B to make the p16 patches more available (incurring a small latency penalty in the process)</p></blockquote><p></p>
[QUOTE="Per Søvik, post: 71739, member: 1285"] Re: Firmware and patching concerns To satisfy the patching needs that sometimes arise, maybe what we need is a "patch-panel" with two blocks of eight patches. This would satisfy the need to patch things by eight where that is needed, you just get a couple more selections ie Patch 1-8 and Patch 9-16. In the "Patch-panel" you should be free to select any signal individually for each patch, and the patches should be available as source everywhere. Such a Patch-panel wouldn't really require extra processing load, as it would (for the most part, depending on how the signals are distributed between the processors) only be a matter of modifying patching adresses. If it is possible to implement this relatively easily within the structure of the current firmware, I wouldn't know. As I haven't got any P16s and are not planning to get any for a while, I use the p16 as my patching panel, looping the AES50 from A to B to make the p16 patches more available (incurring a small latency penalty in the process) [/QUOTE]
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